Thread Verification 2006 (TV06)
 International Workshop on Multithreading in Hardware and Software:
            Formal Approaches to Design and Verification

                          CALL FOR PAPERS

            August 21-22, 2006  in Seattle, Washington
       Part of FLoC 2006 (
                        Hosted by CAV 2006

May  1, 2006 : Submission deadline
June 9, 2006 : Notification of acceptance
July 15,2006 : Final version due

* Vijay Saraswat, IBM T.J. Watson Research Labs, Yorktown Heights, NY
* Maurice Herlihy, Brown University, Providence, RI

The use of threading is already widespread, and will require explosive
growth moving into the future, given that tomorrow's performance /
energy goals will be met through increased concurrency. TV06 invites
papers addressing the tussle between correctness, reliability, and
performance in this space.

It is clear that well-engineered solutions in this space will require
paying adequate attention to several areas, including (but clearly not
limited to):

  * analysis, testing, and verification techniques for threaded systems
  * experience building reliable and high-performance threaded systems
  * case studies of verifying threaded systems
  * language design and formal semantics pertaining to threading
  * logics and models of concurrency, including transaction memories
  * model checking multithreaded programs
  * shared memory consistency models at the hardware, language, and
    library levels
  * runtime verification for multithreaded programs and systems
  * threading issues in multicore systems and chips
  * designing formally well-specified high-performance thread libraries
  * understanding threading issues in specific areas such as
    high-performance computing (e.g., OpenMP), general purpose libraries
    (e.g., PThreads), and languages (e.g., C#, Java)

We invite researchers and engineers working on all aspects of
threading, especially the above listed areas, to submit a paper (these
areas are well represented by members of the TV06 program committee).
Given the vast array of challenging problems to be solved in short order
in these areas, papers from practitioners describing real-world experience
would be especially valuable.

TV06 is hosted by the premier CAV conference, which is part of FLoC
2006 (Federated Logic Conference). FLoC encompasses 6 conferences and
41 workshops, and will be held in August in Seattle.  Please visit for a full description of these
events (and please download a catchy poster while there). The
location, setting, and timing promise ample opportunities for
intellectual and social interactions.

Submissions must be made electronically in PDF format, following the
instructions on the TV06 Web site, which is
Submissions must use the ACM SIG Proceedings format with letter-size paper
(see for details).

Two categories of papers will be accepted:
- long :  10-15 pages, describing in-depth investigations
- short:  4-6   pages, describing a tool, position statement, etc.

Papers should contain a concise abstract of approximately 150 words,
clearly stating the nature of the contributions. At least one author
of each accepted paper is required to register for TV06 (registration
information coming soon at as well as
give a presentation at the workshop.  Papers should be self-contained,
and describe original work, but may be based on (and may contain)
portions from a previously published paper, provided it also includes
substantial new work.  A journal special issue based on selected
papers from this workshop is under consideration.  Email questions, if
any, to  t v 0 6 at c s dot u t a h dot e d u.

Hans Boehm, HP, USA
Ching Tsun Chou, Intel, USA
Byron Cook, Microsoft Research Cambridge, UK
Robert P. Cook, Georgia Southern University, USA
Cormac Flanagan, UC Santa Cruz,USA
Robert M. Kirby,  University of Utah, USA
Timothy G. Mattson, Intel, USA
Shaz Qadeer, Microsoft Research, USA
John Regehr, University of Utah, USA
Scott Stoller, SUNY at Stony Brook, USA
Yue Yang, Microsoft, USA

 Ganesh Gopalakrishnan, University of Utah
 John O'Leary,                    Intel